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Selecting the tile shape to reduce the total communication volume
Drosinos, N.   Goumas, G.   Koziris, N.  
Sch. of Electr. & Comput. Eng., National Tech. Univ. of Athens;

This paper appears in: Parallel and Distributed Processing Symposium, 2006. IPDPS 2006. 20th International
Publication Date: 25-29 April 2006
On page(s): 10 pp.-
Location: Rhodes Island,
ISBN: 1-4244-0054-6
INSPEC Accession Number: 8969878
Digital Object Identifier: 10.1109/IPDPS.2006.1639377
Current Version Published: 2006-06-26

Abstract
In this paper, we revisit the tile-shape selection problem, that has been extensively discussed in bibliography. An efficient approach is proposed for the selection of a suitable tile shape, based on the minimization of the process communication volume. We consider the large family of applications that arise from the discretization of partial differential equations (PDEs). Practical experience has shown that for such applications and distributed memory architectures, minimizing the total communication volume is more important than minimizing the total number of parallel execution steps. We formulate a new method to determine an appropriate communication-aware tile shape, i.e. the one that reduces the communication volume for a fixed number of processes. Our approach is equivalent to defining a proper Cartesian process grid with MPI_Cart_Create, which means that it can be incorporated in applications in a straightforward manner. Our experimental results illustrate that by selecting the tile shape with the proposed method, the total parallel execution time is significantly reduced due to the minimization of the communication volume, despite the fact that a few more parallel execution steps are required

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