Power-driven simultaneous resource binding and floorplanning: a probabilistic approach
Davoodi, A.
Srivastava, A.
Dept. of Electr. & Comput. Eng., Univ. of Maryland, College Park, MD, USA;
This paper appears in: Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publication Date: Aug. 2005
Volume: 13,
Issue: 8
On page(s): 934- 942
ISSN: 1063-8210
INSPEC Accession Number: 8587349
Digital Object Identifier: 10.1109/TVLSI.2005.853618
Current Version Published: 2005-09-26
Abstract
Floorplanning information is integrated during resource binding for better modeling of the interconnect effects on timing and power. Although this integration improves the estimation of the interconnect effects, nonavailability of exact net-lengths can result in suboptimal solutions, because global routing is not yet performed. In this work we propose a probabilistic approach to integrate floorplanning and resource binding by modeling the distribution of the net-lengths from a given floorplan. The advantage of this approach is that a probabilistic technique can better capture the inaccuracy associated with net-length estimation, and consequently, the inaccuracy in estimation of net-delay and net-power. The result is higher chance of successful synthesis, and therefore faster timing closure. Additionally, due to better management of uncertainty, it has a better overall post-synthesis power. These results are illustrated in our experiments that were conducted using state of the art commercial and academic tools.
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