Architecture of fault-tolerant multiprocessor workstations
Banatre, J.P.
Banatre, M.
Muller, G.
IRISA/INRIA-Rennes;
This paper appears in: Workstation Operating Systems, 1989., Proceedings of the Second Workshop on
Publication Date: 27-29 Sep 1989
On page(s): 20-24
Meeting Date: 09/27/1989 - 09/29/1989
Location: Pacific Grove, CA, USA
References Cited: 7
INSPEC Accession Number: 3601300
Digital Object Identifier: 10.1109/WWOS.1989.109262
Current Version Published: 2002-08-06
Abstract
A fault-tolerant multiprocessor architecture that is based on
standard processors associated with stable storage boards is presented.
The hardware architecture of the stable storage board and its software
interface are briefly described. The hardware organization of the
fault-tolerant multiprocessor is detailed, and some functionalities of a
secure kernel are examined. The current status of the project is
indicated
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