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A taxonomy of parallel computer architectures
Gurd, J.R.  
Manchester Univ.;

This paper appears in: Design and Application of Parallel Digital Processors, 1988., International Specialist Seminar on the
Publication Date: 11-15 Apr 1988
On page(s): 57-61
Meeting Date: 04/11/1988 - 04/15/1988
Location: Lisbon, Portugal
ISBN: 0-85296-366-1
References Cited: 29
INSPEC Accession Number: 3248465
Current Version Published: 2002-08-06

Abstract
Discusses a framework within which it is possible to compare the overall performance of a wide variety of parallel computing systems. In this context, a computing system comprises components at several levels of abstraction, ranging from applications, through algorithms and various levels of language, to hardware implementation. The basis of the desired framework will be a series of classification schemes or taxonomies, at the various levels of abstraction, together with a set of mapping strategies that guide selection of appropriate options at each level, top-down. At present, it is not feasible to address all levels simultaneously, and so the author concentrates on the `lowest' level of abstraction (i.e. the hardware implementation)

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