An Edge Missing Compensator for Fast Settling Wide Locking Range Phase-Locked Loops
Lin, C.-S.
Chien, T.-H.
Wey, C.-L.
Huang, C.-M.
Juang, Y.-Z.
This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: Nov. 2009
Volume: 44,
Issue: 11
On page(s): 3102-3110
ISSN: 0018-9200
Digital Object Identifier: 10.1109/JSSC.2009.2031209
Current Version Published: 2009-11-03
Abstract An edge missing compensator (EMC) is proposed to approach the function of an ideal PD with $pm 2 ^{N-1} times 2pi $ linear range with $N$-bit EMC. A PLL implemented with a 9-bit EMC achieves 320 MHz frequency hopping within 10$~mu{hbox {s}}$ logarithmically which is about 2.4 times faster than the conventional design. The reference spur of the PLL is ${-}{hbox {48.7~dBc}}$ and the phase noise is ${-}hbox{88.31~dBc/Hz}$ at 10 kHz offset with $K_{rm VCO}= -$2 GHz/V.
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