Accurate Array-Based Measurement for Subthreshold-Current of MOS Transistors
Sato, T.
Ueyama, H.
Nakayama, N.
Masu, K.
This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: Nov. 2009
Volume: 44,
Issue: 11
On page(s): 2977-2986
ISSN: 0018-9200
Digital Object Identifier: 10.1109/JSSC.2009.2028944
Current Version Published: 2009-11-03
Abstract A MOS transistor-array structure for accurate subthreshold current characterization is presented. Two architectural improvements called LCS and PES, and measured data treatment called MCC are utilized. The LCS, leakage current cut-off switch, reduces unwanted leakage current of the non-target devices which masks the target leakage current. The PES, potential equalizing supply, further reduces the masking current by setting source and drain terminals of the LCS equal. The MCC, masking current cancellation, improves measurement accuracy by subtracting remaining masking current. The proposed circuit structure and the procedure virtually eliminate usual constraint on the number of transistors that can be present in an array. The array structure also offers greater flexibility in choosing a row-column aspect ratio and allows different types of MOS transistors to be interweaved. Experimental array design consisting of 1023 low threshold voltage devices demonstrated accurate measurement of subthreshold leakage current with precision of a few picoamperes.
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