Design Considerations for 60 GHz Transformer-Coupled CMOS Power Amplifiers
Chowdhury, D.
Reynaert, P.
Niknejad, A.M.
Berkeley Wireless Res. Center, Univ. of California at Berkeley, Berkeley, CA, USA;
This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: Oct. 2009
Volume: 44,
Issue: 10
On page(s): 2733-2744
ISSN: 0018-9200
INSPEC Accession Number: 10880533
Digital Object Identifier: 10.1109/JSSC.2009.2028752
Current Version Published: 2009-09-22
Abstract
This work discusses the design methodologies for efficient power generation at mm-wave frequencies in CMOS. Passive elements play an important role in PA design, as they determine both the output power and power gain of the circuit. In this work, we have developed a methodology for design of transformer-coupled power amplifiers. A distributed model of on-chip transformers has been developed that can predict the performance up to very high frequencies, is length scalable and uses only a few parameters , compared to a complete lumped model. Using the model, a two-stage transformer-coupled PA has been designed in 90 nm CMOS. The prototype has one of the highest output powers reported for a 60 GHz CMOS PA. A three-stage improved design with higher gain and efficiency is reported, stressing the importance of driver stage design at these frequencies. The PA has been integrated into a complete transmitter and tested with 10 Gb/s QPSK modulated data.
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