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Exploring parallelizations of applications for MPSoC platforms using MPA
Baert, R.   Brockmeyer, E.   Wuytack, S.   Ashby, T.J.  
IMEC, Leuven;

This paper appears in: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Publication Date: 20-24 April 2009
On page(s): 1148-1153
Location: Nice,
ISSN: 1530-1591
ISBN: 978-1-4244-3781-8
INSPEC Accession Number: 10730316
Current Version Published: 2009-06-23

Abstract
This paper presents a tool for exploring different parallelization options for an application. It can be used to quickly find a high-quality match between an application and a multi-processor platform architecture. By specifying the parallelization at a high abstraction level, and leaving the actual source code transformations to the tool, a designer can try out many parallelizations in a short time. A parallelization may use either functional or data-level splits, or a combination of both. An accompanying high-level simulator provides rapid feedback about the expected performance of a parallelization, based on platform parameters and profiling data of the sequential application on the target processor. The use of the tool and simulator are demonstrated on an MPEG-4 video encoder application and two different platform architectures.

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