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Systolic like soft-detection architecture for 4×4 64-QAM MIMO system
Bhagawat, P.   Dash, R.   Gwan Choi  
Dept. of E.C.E, Texas A&M Univ., College-Station, TX;

This paper appears in: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Publication Date: 20-24 April 2009
On page(s): 870-873
Location: Nice,
ISSN: 1530-1591
ISBN: 978-1-4244-3781-8
INSPEC Accession Number: 10730277
Current Version Published: 2009-06-23

Abstract
MIMO systems (with multiple transmit and receive antennas) are becoming increasingly popular, and many next-generation systems such as WiMAX, 3-GPP LTE and IEEE802.11n wireless LANs relay on the increased throughput of MIMO systems with up to four antennas at receiver and transmitter. High throughput implementation of the detection unit for MIMO systems is a significant challenge especially for higher order modulation schemes. To achieve superior Bit Error Rate (BER) or Frame Error Rate (FER) performance, the detector has to provide soft values to advanced Forward Error Correction (FEC) schemes like Turbo Codes. This paper presents a systolic soft detector architecture for high dimensional (eg. 4times4, 64-QAM) MIMO systems. A Single detector core achieves, throughput of 215 Mbps and power consumption of 23.6 mW, whiles using only 33.1 K gate equivalent (for l2 norm). Impressive SNR gains of almost 2 dB are observed with respect to the hard detection counterpart over a block fading channel (at an FER of 1%). Additionally, the architecture can be stacked to give linear increase in throughput with linear increase in hardware resources.

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