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UMTS MPSoC design evaluation using a system level design framework
Densmore, D.   Simalatsar, A.   Davare, A.   Passerone, R.   Sangiovanni-Vincentelli, A.  
Univ. of California, Berkeley, CA;

This paper appears in: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Publication Date: 20-24 April 2009
On page(s): 478-483
Location: Nice,
ISSN: 1530-1591
ISBN: 978-1-4244-3781-8
INSPEC Accession Number: 10730464
Current Version Published: 2009-06-23

Abstract
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design framework, Metro II, to carry out simulation and design space exploration of multi-core architectures. We illustrate the design methodology on a UMTS data link layer design case study with both a timed and untimed functional model as well as a complete set of MPSoC architectural services. We compare different architectures (including RTOSes) explored with Metro II and quantify the associated simulation overhead.

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