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User-centric design space exploration for heterogeneous Network-on-Chip platforms
Chen-Ling Chou   Marculescu, R.  
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA;

This paper appears in: Design, Automation & Test in Europe Conference & Exhibition, 2009. DATE '09.
Publication Date: 20-24 April 2009
On page(s): 15-20
Location: Nice,
ISSN: 1530-1591
ISBN: 978-1-4244-3781-8
INSPEC Accession Number: 10730339
Current Version Published: 2009-06-23

Abstract
In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the network-on-chip (NoC) approach. As a novel contribution, we consider explicitly the information about the user experience into a design flow which aims at minimizing the workload variance; this allows the system to better adapt to different types of user needs and workload variations. More specifically, we first collect various user traces from various applications and generate specific clusters using machine learning techniques. For each cluster of such user traces, depending on the architectural parameters extracted from high-level specifications, we propose an optimization method to generate the NoC system architecture. Finally, we validate the user-centric design space exploration using realistic traces and compare it to the traditional NoC design methodology.

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