Propositional approximations for bounded model checking of partial circuit designs
Becker, B.
Herbstritt, M.
Kalinnik, N.
Lewis, M.
Lichtner, J.
Nopper, T.
Wimmer, R.
Albert-Ludwigs-Univ., Freiburg;
This paper appears in: Computer Design, 2008. ICCD 2008. IEEE International Conference on
Publication Date: 12-15 Oct. 2008
On page(s): 52-59
Location: Lake Tahoe, CA,
ISSN: 1063-6404
ISBN: 978-1-4244-2657-7
INSPEC Accession Number: 10466568
Digital Object Identifier: 10.1109/ICCD.2008.4751840
Current Version Published: 2009-01-19
Abstract
Bounded model checking of partial circuit designs enables the detection of errors even when the implementation of the design is not finished. The behavior of the missing parts can be modeled by a conservative extension of propositional logic, called 01X-logic. Then the transitions of the underlying (incomplete) sequential circuit under verification have to be represented adequately. In this work, we investigate the difference between a relation-oriented and a function-oriented approach for this issue. Experimental results on a large set of examples show that the function-oriented representation is most often superior w. r. t. (1) CPU runtime and (2) accuracy regarding the ability to find a counterexample, such that by using the function-oriented approach an increase of accuracy up to 210% and a speed-up of the CPU runtime up to 390% compared to the relation-oriented approach are achieved. But there are also relevant examples, e. g. a VLIW-ALU, for which the relation-oriented approach outperforms the function-oriented one by 300% in terms of CPU-time, showing that both approaches are efficient for different scenarios.
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