Space Vector Based Hybrid PWM Techniques for Reduced Current Ripple
Narayanan, G.
Ranganathan, V.T.
Zhao, D.
Krishnamurthy, H.K.
Ayyanar, R.
Indian Inst. of Sci., Bangalore;
This paper appears in: Industrial Electronics, IEEE Transactions on
Publication Date: April 2008
Volume: 55,
Issue: 4
On page(s): 1614-1627
ISSN: 0278-0046
INSPEC Accession Number: 9920933
Digital Object Identifier: 10.1109/TIE.2007.907670
Current Version Published: 2008-04-04
Abstract
This paper investigates certain novel switching sequences involving division of active vector time for space vector based pulsewidth modulation (PWM) generation for a voltage source inverter. This paper proposes two new sequences, and identifies all possible sequences, which result in the same average switching frequency as conventional space vector PWM (CSVPWM) at a given sampling frequency. This paper brings out a method for designing hybrid PWM techniques involving multiple sequences to reduce line current ripple. The three proposed hybrid PWM techniques (three-zone PWM, five-zone PWM and seven zone PWM) employ three, five and seven different sequences, respectively, in every sector. Each sequence is employed in a spatial region within the sector where it results in the lowest rms current ripple over the given sampling period. The proposed techniques lead to a significant reduction in THD over CSVPWM at high line voltages. The five-zone technique results in the lowest THD among real-time techniques with uniform sampling, while the seven-zone technique is the best among real-time techniques with twin sampling rates. The superior harmonic performance of the proposed techniques over CSVPWM and existing bus-clamping PWM techniques is established theoretically as well as experimentally.
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