New digital control method for power factor correction
Wanfeng Zhang
Guang Feng
Yan-Fei Liu
Bin Wu
Marvell Semicond. Inc., Sunnyvale, CA, USA;
This paper appears in: Industrial Electronics, IEEE Transactions on
Publication Date: June 2006
Volume: 53,
Issue: 3
On page(s): 987- 990
ISSN: 0278-0046
INSPEC Accession Number: 8933262
Digital Object Identifier: 10.1109/TIE.2006.874255
Current Version Published: 2006-05-30
Abstract
For conventional digital power-factor correction (PFC) control methods, the duty cycle is calculated in every switching period. One main implementation barrier for the digital control of PFC is the limited switching frequency due to the limited processor speed. A new digital PFC control method is proposed to solve this problem. Based on the input current and duty cycles of the previous half-line periods, the new digital PFC control method uses an optimization algorithm to generate all of the duty cycles in advance, which are required to achieve PFC for one half-line period. Total harmonic distortion, which is directly related to the power factor, is adopted as the objective function. The proposed new digital PFC control strategy overcomes the problem of limited switching frequency due to a limited digital signal processor (DSP) speed. The proposed algorithm can be implemented by a low-cost DSP. Simulation results show that unity power factor is achieved using the proposed method.
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