Power-mode-controlled power-factor corrector for electronic ballast
Azcondo, F.J.
Branas, C.
Casanueva, R.
Bracho, S.
Syst. & Autom. Eng. Dept., Univ. of Cantabria, Santander, Spain;
This paper appears in: Industrial Electronics, IEEE Transactions on
Publication Date: Feb. 2005
Volume: 52,
Issue: 1
On page(s): 56- 65
ISSN: 0278-0046
INSPEC Accession Number: 8275528
Digital Object Identifier: 10.1109/TIE.2004.841140
Current Version Published: 2005-02-07
Abstract
Medium- to high-power electronic ballasts are designed with two power conversion stages. The power-factor corrector (PFC) stabilizes the voltage supplied to the second stage and forces the utility current to meet the required standard. The inverter section stabilizes the arc in the lamp, and keeps the lamp power under the specified values. This paper proposes that the PFC section is to provide the power stability of the system while the inverter section operates in open loop. Consequences of this solution are: the power variation in the lamp caused by its aging is prevented, the complex dynamic of the lamp has no influence in the design, some extra voltage is available to achieve the lamp ignition, warmup time is reduced, and dimming control is easily implemented by modifying either the power reference or the bias value in the PFC control circuit. The inverter section is a half-bridge LCpCs resonant inverter designed to require minimum variation of the input voltage to supply constant power to the lamp. In this way the operation point suffers little changes and no overdimensioning of the PFC and inverter components is necessary to meet the power source condition.
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