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FAUST: An MOS Fault Simulator with Timing Information
Hsi-Ching Shih   Rahmeh, J.T.   Abraham, J.A.  

This paper appears in: Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publication Date: October 1986
Volume: 5,  Issue: 4
On page(s): 557- 563
ISSN: 0278-0070
Current Version Published: 2004-03-03

Abstract
This paper describes FAUST, an MOS fault simulator with timing information. FAUST simulates the effects of realistic physical failures on MOS circuits and uses a static concurrent fault-simulation technique to evaluate the fault-free circuit and all the faulty circuits in one pass. FAUST produces voltage waveforms as well as logic tables with delay information for the fault-free circuit and for each of the faulty circuits.

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