Selective harmonic elimination and current/voltage control incurrent/voltage-source topologies: a unified approach
Espinoza, J.R.
Joos, G.
Guzman, J.I.
Moran, L.A.
Burgos, R.P.
Dept. de Ingenieria Electrica, Concepcion Univ. ;
This paper appears in: Industrial Electronics, IEEE Transactions on
Publication Date: Feb 2001
Volume: 48,
Issue: 1
On page(s): 71-81
ISSN: 0278-0046
References Cited: 9
CODEN: ITIED6
INSPEC Accession Number: 6860881
Digital Object Identifier: 10.1109/41.904556
Current Version Published: 2002-08-07
Abstract
This paper presents a unified approach for generating
pulsewidth-modulated patterns for three-phase current-source rectifiers
and inverters (CSR/Is) that provides unconstrained selective harmonic
elimination and fundamental current control. The approach uses the
chopping angles or gating patterns developed for voltage-source
rectifiers and inverters in combination with a logic circuit to generate
the gating patterns for CSR/Is. The circuit also includes naturally and
symmetrically distributed shorting pulses. Thus, the approach avoids the
hassle of positioning the shorting pulses and defining and solving a set
of nonlinear equations dedicated to CSR/Is. Moreover, the approach can
eliminate an even or odd arbitrary number of harmonics (e.g.,
fundamental current control and elimination of the 5th, 7th, and 11th
harmonics). This is an improvement over existing techniques and a new
approach to pattern generation. Simulated and experimental results for
both static and dynamic operating conditions are presented in order to
validate the effectiveness of the approach
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