Low-swing on-chip signaling techniques: effectiveness androbustness
Zhang, H.
George, V.
Rabaey, J.M.
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA;
This paper appears in: Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publication Date: Jun 2000
Volume: 8,
Issue: 3
On page(s): 264-272
Meeting Date: 08/16/1999 - 08/17/1999
Location: San Diego, CA, USA
ISSN: 1063-8210
References Cited: 14
CODEN: IEVSE9
INSPEC Accession Number: 6642816
Digital Object Identifier: 10.1109/92.845893
Current Version Published: 2002-08-06
Abstract
This paper reviews a number of low-swing on-chip interconnect
schemes and presents a thorough analysis of their effectiveness and
limitations, especially on energy efficiency and signal integrity. In
addition, several new interface circuits presenting even more energy
savings and better reliability are proposed. Some of these circuits not
only reduce the interconnect swing, but also use very low supply
voltages so as to obtain quadratic energy savings. The performance of
each of the presented circuits is thoroughly examined using simulation
on a benchmark interconnect circuit. Significant energy savings up to a
factor of six have been observed
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