Automatic software toolkit generation for embedded systems-on-chip
Halambi, A.
Grun, P.
Tomiyama, H.
Dutt, N.
Nicolau, A.
Center for Embedded Comput. Syst., California Univ., Irvine, CA;
This paper appears in: VLSI and CAD, 1999. ICVC '99. 6th International Conference on
Publication Date: 1999
On page(s): 107-116
Meeting Date: 10/26/1999 - 10/27/1999
Location: Seoul, South Korea
ISBN: 0-7803-5727-2
References Cited: 44
INSPEC Accession Number: 6589210
Digital Object Identifier: 10.1109/ICVC.1999.820839
Current Version Published: 2002-08-06
Abstract
Modern embedded Systems-on-Chips (SOCs) will allow the system
designer to customize Intellectual Property (IP) cores (fixed and
programmable), together with custom logic and large amounts of embedded
memory. As the software content in these emerging embedded SOCs begins
to dominate the SOC design process, there is a critical need for support
of an integrated software development environment (including compilers,
simulators and debuggers). Furthermore, since many characteristics of
these processor core IPs (e.g., instruction-sets, memory configurations)
are increasingly customizable, the entire software toolkit chain needs
to be customized and generated to support both early design space
exploration (for performance, power and cost constraints), as well as
high-qualify software generation. This paper first surveys recent
efforts in Architecture Description Languages (ADLs) used to perform
early validation and exploration of SOC architectures. The second part
of the paper focuses on approaches to software toolkit generation that
automatically produce the software infrastructure (e.g., compilers,
simulators, debuggers) which will enable true hardware/software codesign
of these emerging embedded SOCs
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