HML, a novel hardware description language and its translation toVHDL
Yanbing Li
Leeser, M.
Synopsis Inc., Mountain View, CA;
This paper appears in: Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publication Date: Feb 2000
Volume: 8,
Issue: 1
On page(s): 1-8
ISSN: 1063-8210
References Cited: 15
CODEN: IEVSE9
INSPEC Accession Number: 6527735
Digital Object Identifier: 10.1109/92.820756
Current Version Published: 2002-08-06
Abstract
We present hardware ML (HML), an innovative hardware description
language (HDL) based on the functional programming language SML.
Features of HML not found in other HDL's include polymorphic types and
advanced type checking and type inference techniques. We have
implemented an HML type checker and a translator for automatically
generating VHDL from HML descriptions. We generate a synthesizable
subset of VHDL and automatically infer types and interfaces. This paper
gives an overview of HML and discusses the translation from HML to VHDL
and the type inference process
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