A CPLD-based RC4 cracking system
Kundarewich, P.D.
Wilton, S.J.E.
Hu, A.J.
Dept. of Electr. & Comput. Eng., British Columbia Univ., Vancouver, BC;
This paper appears in: Electrical and Computer Engineering, 1999 IEEE Canadian Conference on
Publication Date: 1999
Volume: 1,
On page(s): 397-402 vol.1
Meeting Date: 05/09/1999 - 05/12/1999
Location: Edmonton, Alta., Canada
ISBN: 0-7803-5579-2
References Cited: 6
INSPEC Accession Number: 6497053
Digital Object Identifier: 10.1109/CCECE.1999.807231
Current Version Published: 2002-08-06
Abstract
Presents a complex programmable logic device (CPLD) based system
for cracking the RC4 (Rivest Cipher 4) encryption algorithm. The system
achieves an outstanding price/performance ratio, easily beating other
low-cost approaches, such as commodity PCs. The system was implemented
using a single Altera EPF10K20 CPLD on an Altera UP1 Education Board.
This CPLD is large enough to contain the control unit and five
functional units. Measured performance on our prototype shows that we
can crack a 32-bit RC4 in an expected time of 15 hours (30 hours worst
case). This gives a theoretical expected time of 159 days to crack
40-bit keys-the maximum possible key length that can exported from
Canada and the USA. Our results demonstrate the effectiveness of
programmable logic (CPLD or FPGA) against even a cryptosystem designed
for software implementation
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