Software implementation of SHDSL transceivers on a novel DSP architecture

The continuous development in communication technology demands high flexibility and short product cycles. The analysis of the communication standard SHDSL provides computational requirements, which can be used to specify a new type of signal processor. This paper examines the architectural issues for a vector processor, which shall handle communication algorithms as applied to SHDSL. It will be shown that enhancements to the conventional approach of vector computing significantly increases the utilization of scalar algorithms. This makes vector processing a suitable solution for communication applications.