A model-driven methodology for the development of SystemC executable environments

System-level design methodologies rely on high-level modeling and analysis techniques. Model driven development (MDD), component-based design (CBD) and abstraction enable to efficiently tackle the modeling of complex embedded systems. High-level dynamic estimation techniques give a chance for enabling from those models fast performance assessment of the design alternatives for such complex systems at an early design space exploration (DSE) phase. In this context, finding efficient design solutions heavily rely on a model of the system environment able to reflect feasible and common use cases. Moreover, such environment modeling also requires the abstraction and automated design support enabled by model driven design techniques for system modeling. This paper presents a UML-based methodology for the specification of the verification environment at the same level of the system model, and a framework which automates the extraction of input stimuli in SystemC, thus enabling building an standard and executable verification environment.