Multi-purpose neuro-architecture with memristors

An analog CMOS neuromorphic design utilizing spike timing dependent plasticity and memristor synapses is investigated for use in building a multi-purpose analog neuromorphic chip. In order to obtain a multi-purpose chip, a suitable architecture is established and several functions with the proposed architecture are shown. Using the IBM 90 nm CMOS9RF process, neurons are designed to interface with Verilog-A memristor synapse models to perform the XOR and Edge Detection functions.