Electro-thermal co-simulation of ICs with runtime back-annotation capability

This paper presents a novel approach to logical and thermal co-simulation of ASIC circuits. Numerous electrothermal simulator implementations are present nowadays, but these simulators approach the electro-thermal simulation domain by co-simulating electronic and thermal effects at a low structural level. This approach has the advantage of being very accurate but at the expense of simulation time. In this paper we provide an alternative way to simulate standard cell ASIC circuits electrically and thermally in a concurrent process in real-time, in RTL level. Our approach takes standard cells of the digital design as basic building blocks and calculates a thermal distribution map on the surface of the virtual chip. The temperature map is calculated from the cells' power characteristics and the switching activity of the regularly working circuit. We call the presented approach logi-thermal simulation. An implementation of the method is also presented in this paper: a new simulation software, LogiTherm is under heavy development in the Department of Electron Devices at BME, Hungary.