Computing lower bounds on functional units before scheduling
Chaudhuri, S.
Walker, R.A.
Cadence Design Syst. Inc., Chelmsford, MA;
This paper appears in: Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publication Date: Jun 1996
Volume: 4,
Issue: 2
On page(s): 273-279
ISSN: 1063-8210
References Cited: 19
CODEN: IEVSE9
INSPEC Accession Number: 5296164
Digital Object Identifier: 10.1109/92.502199
Current Version Published: 2002-08-06
Abstract
The authors present a new polynomial-time algorithm for computing
lower bounds on the number of functional units (FUs) of each type
required to schedule a data flow graph in a specified number of control
steps. A formal approach is presented that is guaranteed to find the
tightest possible bounds that can be found by relaxing either the
precedence constraints or integrality constraints on the scheduling
problem. This tight, yet fairly efficient, bounding method can be used
to estimate FU area, to generate resource constraints for reducing the
search space, or in conjunction with exact techniques for efficient
optimal design space exploration
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