Reducing operating voltage from 3, 2, to 1 volt and below-challenges and guidelines for possible solutions [CMOS]

We discuss challenges to reducing integrated circuit power consumption by reducing operating voltage, and guidelines for possible solutions via processing technology and circuit design. Migrating from 3-Volt to 2-Volt operation, the key issue is optimizing the processing technology to maintain the performance. At 1 Volt, interfacing low-voltage circuits with standard I/O becomes the main challenge. To go below 1 Volt, we must re-visit transistor design issues very carefully.