Contention-aware application mapping for Network-on-Chip communication architectures
Chen-Ling Chou
Marculescu, R.
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA;
This paper appears in: Computer Design, 2008. ICCD 2008. IEEE International Conference on
Publication Date: 12-15 Oct. 2008
On page(s): 164-169
Location: Lake Tahoe, CA,
ISSN: 1063-6404
ISBN: 978-1-4244-2657-7
INSPEC Accession Number: 10400751
Digital Object Identifier: 10.1109/ICCD.2008.4751856
Current Version Published: 2009-01-19
Abstract
In this paper, we analyze the impact of network contention on the application mapping for tile-based network-on-chip (NoC) architectures. Our main theoretical contribution consists of an integer linear programming (ILP) formulation of the contention-aware application mapping problem which aims at minimizing the inter-tile network contention. To solve the scalability problem caused by ILP formulation, we propose a linear programming (LP) approach followed by an mapping heuristic. Taken together, they provide near-optimal solutions while reducing the runtime significantly. Experimental results show that, compared to other existing mapping approaches based on communication energy minimization, our contention-aware mapping technique achieves a significant decrease in packet latency (and implicitly, a throughput increase) with a negligible communication energy overhead.
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