I. Introduction
Many system-level design tasks arising within electronic design automation (EDA), such as hardware/software co-design and schedulability analysis, involve one or more computationally expensive cores. In a typical iterative design flow, system designers repeatedly invoke design tools which run these computational cores as a part of their backend. Hence, the running times of these tools which often are in the tune of several hours critically impact their usability. In this paper we explore the possibility of using commodity graphics processing units (GPUs) to accelerate these computational kernels, and thereby improve the running time and usability of the design tools that use them.