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An FSM Reengineering Approach to Sequential Circuit Synthesis by State Splitting
Lin Yuan   Gang Qu   Villa, T.   Sangiovanni-Vincentelli, A.  
Synopsys, Inc., Mountain View, CA;

This paper appears in: Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publication Date: June 2008
Volume: 27,  Issue: 6
On page(s): 1159-1164
Location: Sonoma, CA, USA,
ISSN: 0278-0070
INSPEC Accession Number: 10003068
Digital Object Identifier: 10.1109/TCAD.2008.923245
Current Version Published: 2008-05-20

Abstract
This paper presents a finite-state machine (FSM) reengineering method that enhances the FSM synthesis by reconstructing a functionally equivalent but topologically different FSM based on the optimization objective. This method enables the FSM synthesis algorithms to explore a set of functionally equivalent FSMs and obtain better solutions than those in the original FSM. To demonstrate the effectiveness of the proposed method, we apply it to popular power- and area-driven FSM synthesis algorithms, respectively. Our method achieves an average of 5.5% power reduction and 2.7% area reduction, respectively, on 25 Microelectronics Center of North Carolina (MCNC) FSM benchmarks, where the proposed method is applicable. This is a significant performance improvement for the power- and area-driven FSM synthesis algorithms being used. Our method has a negligible run-time overhead, and it maintains the quality of the synthesis solutions.

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