Multi-Bit Sigma Delta ADC with Reduced Feedback Levels, Extended Dynamic Range and Increased Tolerance for Analog Imperfections
Jian-Yi Wu
Subramoniam, R.
Zhenyong Zhang
Djabbari, A.
Holloway, P.
Maloberti, F.
Yousefi, M.
Asian, M.
Hua Hong
Bahai, A.
Nat. Semicond., Santa Clara;
This paper appears in: Custom Integrated Circuits Conference, 2007. CICC '07. IEEE
Publication Date: 16-19 Sept. 2007
On page(s): 77-80
Location: San Jose, CA,
ISBN: 978-1-4244-1623-3
INSPEC Accession Number: 9803919
Digital Object Identifier: 10.1109/CICC.2007.4405685
Current Version Published: 2008-01-21
Abstract
A novel second order sigma delta modulator (SDM) with 5-bit quantizer has been proposed with simplified DAC arrays, high-order truncation noise shaping for increased tolerance to analog imperfections, and extended dynamic range for a maximum input signal swing of up to -0.45 dBFS. With truncation filter and pseudo SDM in the DSP, the truncation and saturation errors are compensated through the DAC arrays and the DSP. The design was fabricated in 0.18mu dual gate oxide (DGO) process. A SNDR (signal-to-noise-and-distortion ratio) of 98.4 dB and a SNR (signal-to-noise ratio) of 108-dB were measured for a 31.25-KHz signal bandwidth at 8-MHz sampling frequency with a power consumption of about 14.7 mW.
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