Patching Processor Design Errors
Narayanasamy, S.
Carneal, B.
Calder, B.
California Univ., San Diego;
This paper appears in: Computer Design, 2006. ICCD 2006. International Conference on
Publication Date: 1-4 Oct. 2007
On page(s): 491-498
Location: San Jose, CA,
ISSN: 1063-6404
ISBN: 978-0-7803-9707-1
INSPEC Accession Number: 9789713
Digital Object Identifier: 10.1109/ICCD.2006.4380861
Current Version Published: 2007-11-12
Abstract
Microprocessors can have design errors that escape the test and validation process. The cost to rectify these errors after shipping the processors can be very expensive as it may require replacing the processors and stalling the shipment. In this paper, we discuss architecture support to allow patching the design errors in the processors that have already been shipped out. A contribution of this paper is our analysis showing that a majority of errors can be detected by monitoring a subset of signals in the processors. We propose to incorporate a programmable error detector in the processor that monitors these signals to detect and initiate recovery using one of the mechanisms that we discuss. The proposed hardware units can be programmed using patches consisting of the errata signatures which the manufacturer develops and distributes when errors are discovered in the post-design phase.
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