A Hardware Memory Race Recorder for Deterministic Replay
Xu, M.
Bodik, R.
Hill, M.D.
This paper appears in: Micro, IEEE
Publication Date: Jan.-Feb. 2007
Volume: 27,
Issue: 1
On page(s): 48-55
ISSN: 0272-1732
INSPEC Accession Number: 9499096
Digital Object Identifier: 10.1109/MM.2007.2
Current Version Published: 2007-05-21
Abstract
As hardware vendors transition to multicore chips, software vendors face increased software reliability challenges. To effectively debug software in this new world, developers must be able to replay executions that exhibit a bug so that they can zero in on concurrency bugs - especially intermittent ones. Such deterministic replay also aids fault detection and recovery, intrusion detection, and the like. Deterministic replay requires both a recorder and a replayer. The recorder logs information during multithreaded program execution that is sufficient to enable deterministic replay. In the postmortem analysis, the replayer uses the logged information, together with the program binary, to faithfully replay the original execution. The replay will always exercise the same bugs and produce the same outputs. Clearly, an investment in modest chip resources has great potential to ease the challenges of debugging the multithreaded software that both users and vendors will continue to demand
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