High-level DSP synthesis using the COMET design system
Ching-Tang Chang
Rose, K.
Walker, R.A.
Center for Integrated Electron., Rensselaer Polytech. Inst., Troy, NY;
This paper appears in: ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Publication Date: 27 Sep-1 Oct 1993
On page(s): 408-411
Meeting Date: 09/27/1993 - 10/01/1993
Location: Rochester, NY, USA
ISBN: 0-7803-1375-5
References Cited: 6
INSPEC Accession Number: 4985848
Digital Object Identifier: 10.1109/ASIC.1993.410748
Current Version Published: 2002-08-06
Abstract
The authors address methodologies for high-level synthesis of
dedicated digital signal processing (DSP) architectures using the
cluster-oriented and minimum execution time (COMET) design system. The
system is tuned to the synthesis of DSP ASICs from behavioral
specifications written in VHDL. COMET is capable of generating more
efficient architectures using innovative scheduling and resource
allocation algorithm which exploit the cluster information and maximize
the parallel tasks. With these transformations, major improvements are
achieved with fewer registers and interconnections; an industrial
quality design is then derived in both FIR and elliptic filter examples
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