Prep benchmarks reveal performance and capacity tradeoffs ofprogrammable logic devices
Kliman, S.
Altera Corp., San Jose, CA;
This paper appears in: ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International
Publication Date: 19-23 Sep 1994
On page(s): 376-382
Meeting Date: 09/19/1994 - 09/23/1994
Location: Rochester, NY, USA
ISBN: 0-7803-2020-4
References Cited: 2
INSPEC Accession Number: 4998193
Digital Object Identifier: 10.1109/ASIC.1994.404537
Current Version Published: 2002-08-06
Abstract
The process of choosing a programmable logic device (PLD) involves
reviewing marketing material, studying specifications and learning PLD
development tools. Until benchmark circuits were developed by the
Programmable Electronics Performance Corporation (PREP), this was a
costly and timely undertaking because no standard existed to compare
PLDs against one another. This paper analyzes the PREP benchmark results
and shows the capacity and performance tradeoffs associated with
different programmable logic devices
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