Requirements for Time-to-Digital Converters in the context of digital-PLL based Frequency Synthesis and GSM Modulation

A key issue in proceeding the digitization of Phase-Locked Loops (PLLs) is the realization of proper phase detectors in the digital domain. This paper presents simulative analysis of the properties and requirements for Time-to-Digital Converters (TDCs) used for phase comparison in digitized fractional-N modulators with two-point modulation. Effects due to quantization of the TDC on frequency synthesis as well as GSM modulation quality are considered, defining the realization requirements for a transmitter.