Xtmap: generate-and-test mapper for table-lookup gate arrays
Karplus, K.
California Univ., Santa Cruz, CA;
This paper appears in: Compcon Spring '93, Digest of Papers.
Publication Date: 22-26 Feb 1993
On page(s): 391-399
Meeting Date: 02/22/1993 - 02/26/1993
Location: San Francisco, CA, USA
ISBN: 0-8186-3400-6
References Cited: 20
INSPEC Accession Number: 4750289
Digital Object Identifier: 10.1109/CMPCON.1993.289703
Current Version Published: 2002-08-06
Abstract
Introduces Xtmap, a technology mapper for f-input
table-lookup cells based on a generate-and-test paradigm. Xtmap can
optimize for area and delay simultaneously and produces smaller circuits
than previous mappers that considered delay, while matching their delay
values. Tables of benchmark results are used to compare Xtmap with Xmap,
Dagmap, FlowMap, chortle-d, and mis-pga covering algorithms
Index
Terms
Available to subscribers and IEEE members.
References
Available to subscribers and IEEE members.
Citing Documents
Available to subscribers and IEEE members.
Cart
