An Improved Min-Cut Algonthm for Partitioning VLSI Networks
Krishnamurthy, B.
General Electric Research and Development Center;
This paper appears in: Computers, IEEE Transactions on
Publication Date: May 1984
Volume: C-33,
Issue: 5
On page(s): 438-446
ISSN: 0018-9340
Digital Object Identifier: 10.1109/TC.1984.1676460
Current Version Published: 2006-08-21
Abstract
Recently, a fast (linear) heuristic for improving min-cut partitions of VLSI networks was suggested by Fiduccia and Mattheyses [6]. In this-paper we generalize their ideas and suggest a class of increasingly sophisticated heuristics. We then show, by exploiting the data structures originally suggested by them, that the computational complexity of any specific heuristic in the suggested class remains linear in the size of the network.
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