Effect of electrode offset on the CMRR of the current balancing instrumentation amplifiers

This paper describes the effect of the electrode-offset voltage on the CMRR of the current balancing instrumentation amplifiers (CBIA). Calculated CMRR behavior of the implemented instrumentation amplifier (IA) in 0.5 /spl mu/m CMOS technology is compared with the simulated and measured results. Finally, a technique for improving the CMRR of IA under electrode-offset is proposed.