Abstract
A fast algorithm and a tool for the estimation of dynamic power
dissipation in digital circuits are presented. The logic waveforms
generated by a standard logic simulator are used in order to compute an
instantaneous power waveform at the gate- (cell-) level. The tool itself
is technology independent; it takes parameters for the currently used
cell library from a database that has been established by analog
simulation. Modeling of new libraries is easy due to a flexible database
format. When compared to SPICE, experimental results show good accuracy
for average power consumption (Δ<3%), a close matching of peak
power values and a speed-up of more than four orders of magnitude
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