Toward a scalable, silicon-based quantum computing architecture
Copsey, D.
Oskin, M.
Impens, F.
Metodiev, T.
Cross, A.
Chong, F.T.
Chuang, I.L.
Kubiatowicz, J.
Dept. of Comput. Sci., Univ. of California, Davis, CA, USA;
This paper appears in: Selected Topics in Quantum Electronics, IEEE Journal of
Publication Date: Nov.-Dec. 2003
Volume: 9,
Issue: 6
On page(s): 1552- 1569
ISSN: 1077-260X
INSPEC Accession Number: 7908224
Digital Object Identifier: 10.1109/JSTQE.2003.820922
Current Version Published: 2004-02-06
Abstract
Advances in quantum devices have brought scalable quantum computation closer to reality. We focus on the system-level issues of how quantum devices can be brought together to form a scalable architecture. In particular, we examine promising silicon-based proposals. We discover that communication of quantum data is a critical resource in such proposals. We find that traditional techniques using quantum SWAP gates are exponentially expensive as distances increase and propose quantum teleportation as a means to communicate data over longer distances on a chip. Furthermore, we find that realistic quantum error-correction circuits use a recursive structure that benefits from using teleportation for long-distance communication. We identify a set of important architectural building blocks necessary for constructing scalable communication and computation. Finally, we explore an actual layout scheme for recursive error correction, and demonstrate the exponential growth in communication costs with levels of recursion, and that teleportation limits those costs.
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