Gate oxide integrity issue caused by wall-related process drift in plasma etching

Different gate oxide loss in polysilicon gate etching has been found when the chamber wall condition changes, which might affect the consistency of device performance in IC production. In this work, the mechanism of wall-related process drift has been studied through etch performance evaluation and plasma diagnostics. The root cause of this issue has been identified as significant plasma property change due to the variation of surface recombination rate, of reactive free radicals with wall condition.