Memory-intensive benchmarks: IRAM vs. cache-based machines
Gaeke, B.R.
Husbands, P.
Li, X.S.
Oliker, L.
Yelick, K.A.
Biswas, R.
Comput. Sci. Div., California Univ., Berkeley, CA ;
Abstract
The increasing gap between processor and memory performance has
led to new architectural models for memory-intensive applications. In
this paper, we use a set of memory-intensive benchmarks to evaluate a
mixed logic and DRAM processor called VIRAM as a building block for
scientific computing. For each benchmark, we explore the fundamental
hardware requirements of the problem as well as alternative algorithms
and data structures that can help expose fine-grained parallelism or
simplify memory access patterns. Results indicate that VIRAM is
significantly faster than conventional cache-based machines for problems
that are truly limited by the memory system and that it has a
significant power advantage across all the benchmarks
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