A Low-Power, Linearized, Ultra-Wideband LNA Design Technique
Heng Zhang
Xiaohua Fan
Sinencio, E.S.
Electr. & Comput. Eng. Dept., Texas A & M Univ., College Station, TX;
This paper appears in: Solid-State Circuits, IEEE Journal of
Publication Date: Feb. 2009
Volume: 44,
Issue: 2
On page(s): 320-330
Location: Lille, France,
ISSN: 0018-9200
INSPEC Accession Number: 10416941
Digital Object Identifier: 10.1109/JSSC.2008.2011033
Current Version Published: 2009-01-27
Abstract
This work proposes a practical linearization technique for high-frequency wideband applications using an active nonlinear resistor, and analyzes its performance with Volterra series. The linearization technique is applied to an ultra-wideband (UWB) cascode common gate Low Noise Amplifier (CG-LNA), and two additional reference designs are implemented to evaluate the linearization technique - a standard (without linearization) cascode CG-LNA and a single-transistor CG-LNA. The single-transistor CG-LNA achieves +6.5 to +9.5 dBm IIP3, 10 dB (max.) gain, and 2.9 dB (min.) NF over a 3-11 GHz bandwidth (BW); the LNA consumes 2.4 mW from a 1.3 V supply. The cascode linearized LNA achieves +11.7 to +14.1 dBm IIP3, 11.6 dB (max.) gain, and 3.6 dB (min.) NF over 1.5 to 8.1 GHz; the cascode LNA consumes 2.62 mW from a 1.3 V supply. Experimental results show that the linearization technique improves the cascode LNA's IIP3 by a factor of 3.5 to 9 dB over a 2.5-10 GHz frequency range.
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