100Gbps PCI-express readout for the LHCb upgrade

We present a new data acquisition system under development for the next upgrade of the LHCb experiment at CERN. We focus in particular on the design of a new generation of readout boards, the PCIe40, and on the viability of PCI-express as an interconnect technology for high speed readout. We show throughput measurements across the PCI-express bus on Altera Stratix 5 devices, using Direct Memory Access. Finally we discuss hardware and software design considerations necessary to achieve a throughput of 100Gbps per readout board.