A VLSI implementation of the 4th order elliptic fully differential IIR switched-capacitor low-pass filter in CMOS technology

In this paper a VLSI implementation of the 4
^th
order elliptic fully differential IIR switched-capacitor low-pass filter in CMOS technology is presented. The proposed LPF is composed of two switched-capacitor biquad filter structures connected in cascade. Its transfer function is determined by computing the discrete Fourier transform of the impulse response function. The circuit is implemented on the basis of some building blocks such as operational transconductance amplifiers, transmission gate switches, capacitors and non-overlapping clocks generator. The simulations performed in 180nm CMOS technology confirm the theoretical results.