Simulink modeling of analog to digital converters for post conversion correction development and evaluation

Theoretically time interleaved analog-to-digital converters (TI-ADCs) offer a technologically feasible and cost effective solution to the digitization of wide bandwidth analog signals. In addition to the error sources associated with integrated high performance analog to digital converters (ADCs) and the exaggerated impact of certain error sources, mismatched error sources exist. The topic of post conversion correction is an active area of research in both academia and industry due to the high potential of positive impact in areas like test instrumentation, software defined radio, radar, etc. A key stumbling block to cost effective research and development is the availability of high fidelity, high level simulations of realistic error performance of data converters. This paper describes a high fidelity, high level Simulink™ based M TI-ADC model capable of facilitating cost effective development of efficient post conversion correction algorithms. Four TI-ADCs are interleaved as an example and errors effects are discussed. A survey of published adaptive correction methods to be evaluated against this model is presented.