Development and evaluation of a high performance fine pitch SODIMM socket package

A 256Mbit 133MHz clock rate CMOS Double Data Rate Fast Cycle Random Access Memory (DDR FCRAM) SODIMM/sup /spl reg// Module was developed for a high end telecom application. In order to provide a high speed interconnection in between a FCRAM memory module to a PCBA, a high speed and fine pitch SODIMM socket was designed. In this paper, electrical characteristics, mechanical requirements, as well as assembly and reliability qualification of this socket are discussed. The impact of various socket lead design, solder pad size, and solder paste stencil aperture on the long term solder joint interconnect reliability were investigated. Test vehicles were used for assembly process development and accelerated life testing. These test sockets contained daisy chain connections at both 1/sup st/ level (memory module to socket) and 2nd level (socket to PCB) applications. Accelerated life testing (ATC) using standard air to air thermal cycling between 0-100/spl deg/C was performed with in-situ resistance monitoring. The test results were then used for the final socket design for targeted product applications.