The cylinder switch: an architecture for a manageable VLSI giga-cell switch

A cell switch architecture is proposed that provides resource allocation and buffer management features in the hardware. The cylinder switch system is specifically designed to take advantage of the properties of VLSI, and high-performance structures only available in VLSI can naturally be applied. The switch fabric is constructed from ring buffer/multiplexer VLSI modules that form a cylinder buffer. The buffers of this system are completely shared among the input channels. Multicasting, slot reservation in the buffer and on the output channel, class and priority control, and packet reordering are some of the feature that can be utilized. Both analog and digital observation and control can be utilized. The switch capacity using current VLSI technology could be in the tens of gigabits for a 100*100-channel switch. In addition to analytical and simulation studies, a prototype VLSI chip is being implemented for testing the ideas.<
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