Double-gate FinFET devices with asymmetric and symmetric polysilicon gates have been fabricated. Symmetric gate devices show drain currents competitive with fully optimized bulk silicon technologies. Asymmetric-gate devices show |V/sub t/|/spl sim/0.1 V, with off-currents less than 100 nA/um at V/sub gs/=0.
Published in:
Electron Devices Meeting, 2001. IEDM '01. Technical Digest. International
Date of Conference: 2-5 Dec. 2001